EP2SGX90EF1152C4N

EP2SGX90EF1152C4N FPGAs Overview

The Stratix II GX family of devices is Altera’s third generation of FPGAs to combine high-speed serial transceivers with a scalable, high-performance logic array. Stratix II GX EP2SGX90EF1152C4N devices include 4 to 20 high-speed transceiver channels, each incorporating clock and data recovery unit (CRU) technology and embedded SERDES capability at data rates of up to 6.375 gigabits per second (Gbps). The transceivers are grouped into four-channel transceiver blocks and are designed for low power consumption and small die size. The Stratix II GX EP2SGX90EF1152C4N FPGA technology is built upon the Stratix II architecture and offers a 1.2-V logic array with unmatched performance, flexibility, and time-to-market capabilities. This scalable, high-performance architecture makes Stratix II GX devices ideal for high-speed backplane interface, chip-to-chip, and communications protocol-bridging applications.

The INTEL Embedded - FPGAs (Field Programmable Gate Array) series EP2SGX90EF1152C4N is FPGA Stratix II GX Family 90960 Cells 732.1MHz 90nm Technology 1.2V 1152Pin FC-FBGA, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com, and you can also search for other FPGAs products.

Features

Main device features:

● TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers with performance up to 550 MHz

● Up to 16 global clock networks with up to 32 regional clock networks per device region

● High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters

● Up to four enhanced PLLs per device provide spread spectrum, programmable bandwidth, clock switch-over, real-time PLL reconfiguration, and advanced multiplication and phase shifting

● Support for numerous single-ended and differential I/O standards

● High-speed source-synchronous differential I/O support on up to 71 channels

● Support for source-synchronous bus standards, including SPI-4 Phase 2 (POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI, and CSIX-L1

● Support for high-speed external memory, including quad data rate (QDR and QDRII) SRAM, double data rate (DDR and DDR2) SDRAM, and single data rate (SDR) SDRAM