M4A5-64/32-10VC FPGAs Overview
The ispMACH 4A family from Lattice offers an exceptionally flexible
architecture and delivers a superior Complex Programmable Logic Device (CPLD)
solution of easy-to-use silicon products and software tools. The overall
benefits for users are a guaranteed and predictable CPLD solution, faster
time-to-market, greater flexibility and lower cost. The ispMACH 4A devices offer
densities ranging from 32 to 512 macrocells with 100% utilization and 100%
pin-out retention. The ispMACH 4A families offer 5-V (M4A5-xxx) and 3.3-V
(M4A3-xxx) operation.
ispMACH 4A products are 5-V or 3.3-V in-system
programmable through the JTAG (IEEE Std. 1149.1) interface. JTAG boundary scan
testing also allows product testability on automated test equipment for device
connectivity.
All ispMACH 4A family members deliver First-Time-Fit and easy
system integration with pin-out retention after any design change and refit. For
both 3.3-V and 5-V operation, ispMACH 4A products can deliver guaranteed fixed
timing as fast as 5.0 ns tPD and 182 MHz fCNT through the SpeedLocking feature
when using up to 20 product terms per output.
The ispMACH 4A family offers 20 density-I/O combinations in Thin Quad Flat
Pack (TQFP), Plastic Quad Flat Pack (PQFP), Plastic Leaded Chip Carrier (PLCC),
Ball Grid Array (BGA), finepitch BGA (fpBGA), and chip-array BGA (caBGA)
packages ranging from 44 to 388 pins (Table 3). It also offers I/O safety
features for mixed-voltage designs so that the 3.3-V devices can accept 5-V
inputs, and 5-V devices do not overdrive 3.3-V inputs. Additional features
include BusFriendly inputs and I/Os, a programmable power-down mode for extra
power savings and individual output slew rate control for the highest speed
transition or for the lowest noise transition.
The Lattice CPLD - Complex Programmable Logic Devices series M4A5-64/32-10VC is CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com,
and you can also search for other FPGAs products.
Features
◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families
◆ Flexible
architecture for rapid logic designs
— Excellent First-Time-FitTM and refit
feature
— SpeedLockingTM performance for guaranteed fixed timing
— Central,
input and output switch matrices for 100% routability and 100% pin-out retention
◆ High speed
— 5.0ns tPD Commercial and 7.5ns tPD Industrial
— 182MHz fCNT
◆ 32
to 512 macrocells; 32 to 768 registers
◆ 44 to 388 pins in PLCC, PQFP, TQFP,
BGA, fpBGA and caBGA packages
◆ Flexible architecture for a wide range of design
styles
— D/T registers and latches
— Synchronous or asynchronous mode
—
Dedicated input registers
— Programmable polarity
— Reset/ preset swapping
◆
Advanced capabilities for easy system integration
— 3.3-V & 5-V
JEDEC-compliant operations
— JTAG (IEEE 1149.1) compliant for boundary scan
testing
— 3.3-V & 5-V JTAG in-system programming
— PCI compliant
(-5/-55/-6/-65/-7/-10/-12 speed grades)
— Safe for mixed supply voltage system
designs
— Programmable pull-up or Bus-FriendlyTM inputs and I/Os
— Hot-socketing
— Programmable security bit
— Individual output slew rate control
◆ Advanced
E2CMOS process provides high-performance, cost-effective solutions
◆ Supported
by ispDesignEXPERTTM software for rapid logic development
— Supports HDL design
methodologies with results optimized for ispMACH 4A
— Flexibility to adapt to
user requirements
— Software partnerships that ensure customer success
◆ Lattice
and third-party hardware programming support
— LatticePROTM software for
in-system programmability support on PCs and automated test equipment
—
Programming support on all major programmers including Data I/O, BP
Microsystems, Advin, and System General