EPM3256ATI144-10N FPGAs Overview
The MAX 3000A EPM3256ATI144-10N devices are low–cost, high–performance devices based on the Altera
MAX architecture. Fabricated with advanced CMOS technology, the EEPROM–based MAX
3000A devices operate with a 3.3-V supply voltage and provide 600 to 10,000
usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up
to 227.3 MHz.
The INTEL Embedded - CPLDs (Complex Programmable Logic Devices) series EPM3256ATI144-10N is CPLD MAX 3000A Family 5K Gates 256 Macro Cells 95.2MHz 3.3V, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com,
and you can also search for other FPGAs products.
Features
■ High–performance, low–cost CMOS EEPROM–based programmable logic devices
(PLDs) built on a MAX architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built–in IEEE Std. 1149.1
Joint Test Action Group (JTAG) interface with advanced pin-locking
capability
– ISP circuitry compliant with IEEE Std. 1532
■ Built–in boundary-scan test (BST) circuitry compliant with IEEE Std.
1149.1-1990
■ Enhanced ISP features:
– Enhanced ISP algorithm for faster programming
– ISP_Done bit to ensure complete programming
– Pull-up resistor on I/O pins during in–system programming