ICE40HX4K-BG121

ICE40HX4K-BG121 FPGAs Overview

The iCE40 LP/HX family of ultra-low power, non-volatile FPGAs has five devices with densities ranging from 384 to 7,680 Look-Up Tables (LUTs). In addition to LUT-based, lowcost programmable logic, these devices feature Embedded Block RAM (EBR), Non-volatile Configuration Memory (NVCM) and Phase Locked Loops (PLLs). These features allow the devices to be used in low-cost, high-volume consumer and system applications. Select packages offer High-Current drivers that are ideal to drive three white LEDs, or one RGB LED.

The iCE40 LP/HX devices are fabricated on a 40 nm CMOS low power process. The device architecture has several features such as programmable low-swing differential I/Os and the ability to turn off on-chip PLLs dynamically. These features help manage static and dynamic power consumption, resulting in low static power for all members of the family. The iCE40 LP/HX devices are available in two versions – ultra low power (LP) and high performance (HX) devices.

The iCE40 LP/HX FPGAs are available in a broad range of advanced halogen-free packages ranging from the space saving 1.40 mm x 1.48 mm WLCSP to the PCB-friendly 20 mm x 20 mm TQFP.The iCE40 LP/HX devices offer enhanced I/O features such as pull-up resistors. Pull-up features are controllable on a per-pin basis.

The iCE40 LP/HX devices also provide flexible, reliable and secure configuration from on-chip NVCM. These devices can also configure themselves from external SPI Flash or be configured by an external master such as a CPU.

Lattice provides a variety of design tools that allow complex designs to be efficiently implemented using the iCE40 LP/HX family of devices. Popular logic synthesis tools provide synthesis library support for iCE40 LP/HX. Lattice design tools use the synthesis tool output along with the user-specified preferences and constraints to place and route the design in the iCE40 LP/HX device. These tools extract the timing from the routing and back-annotate it into the design for timing verification.

Lattice provides many pre-engineered IP (Intellectual Property) modules, including a number of reference designs, licensed free of charge, optimized for the iCE40 LP/HX FPGA family. By using these configurable soft core IP cores as standardized blocks, users are free to concentrate on the unique aspects of their design, increasing their productivity.

The Lattice Embedded - FPGAs (Field Programmable Gate Array) series ICE40HX4K-BG121 is IC FPGA 93 I/O 121CABGA, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com, and you can also search for other FPGAs products.

Features

 Flexible Logic Architecture

 Five devices with 384 to 7,680 LUT4s and 10 to 206 I/Os

 Ultra-low Power Devices

 Advanced 40 nm low power process

 As low as 21 µA standby power

 Programmable low swing differential I/Os

 Embedded and Distributed Memory

 Up to 128 kb sysMEM Embedded Block RAM

 Pre-Engineered Source Synchronous I/O

 DDR registers in I/O cells

 High Current LED Drivers

 Three High Current Drivers used for three different LEDs or one RGB LED

 High Performance, Flexible I/O Buffer

 Programmable sysI/O buffer supports wide range of interfaces:

 LVCMOS 3.3/2.5/1.8

 LVDS25E, subLVDS

 Schmitt trigger inputs, to 200 mV typical hysteresis

 Programmable pull-up mode

 Flexible On-Chip Clocking

 Eight low skew global signal resources

 Up to two analog PLLs per device

 Flexible Device Configuration

 SRAM is configured through:

 Standard SPI Interface

 Internal Nonvolatile Configuration Memory (NVCM)

 Broad Range of Package Options

 WLCSP, QFN, VQFP, TQFP, ucBGA, caBGA, and csBGA package options

 Small footprint package options

 As small as 1.40 mm x 1.48 mm

 Advanced halogen-free packaging