XC3S5000-5FG900C FPGAs Overview
Introduction:
The Spartan®-3 family of Field-Programmable Gate Arrays is specifically designed to meet the needs of high volume, cost-sensitive consumer electronic applications. The eight-member family offers densities ranging from 50,000 to 5,000,000 system gates, as shown in Table 1. The Spartan-3 family builds on the success of the earlier Spartan-IIE family by increasing the amount of logic resources, the capacity of internal RAM, the total number of I/Os, and the overall level of performance as well as by improving clock management functions. Numerous enhancements derive from the Virtex®-II platform technology. These Spartan-3 FPGA enhancements, combined with advanced process technology, deliver more functionality and bandwidth per dollar than was previously
possible, setting new standards in the programmable logic industry. Because of their exceptionally low cost, Spartan-3 FPGAs are ideally suited to a wide range of consumer electronics applications, including broadband access, home networking, display/projection and digital television equipment. The Spartan-3 family is a superior alternative to mask rogrammed ASICs. FPGAs avoid the high initial cost, the lengthy development cycles, and the inherent inflexibility of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary, an impossibility with ASICs.
Module 1:
Introduction and Ordering Information
DS099 (v3.1) June 27, 2013
• Introduction
• Features
• Architectural Overview
• Array Sizes and Resources
• User I/O Chart
• Ordering Information
Module 2: Functional Description
DS099 (v3.1) June 27, 2013
• Input/Output Blocks (IOBs)
• IOB Overview
• SelectIO™ Interface I/O Standards
• Configurable Logic Blocks (CLBs)
• Block RAM
• Dedicated Multipliers
• Digital Clock Manager (DCM)
• Clock Network
• Configuration
Module 3:
DC and Switching Characteristics
DS099 (v3.1) June 27, 2013
• DC Electrical Characteristics
• Absolute Maximum Ratings
• Supply Voltage Specifications
• Recommended Operating Conditions
• DC Characteristics
• Switching Characteristics
• I/O Timing
• Internal Logic Timing
• DCM Timing
• Configuration and JTAG Timing
The Xilinx FPGAs series XC3S5000-5FG900C is FPGA Spartan-3 Family 5M Gates 74880 Cells 725MHz 90nm Technology 1.2V 900-Pin F-BGA, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com,
and you can also search for other FPGAs products.
Features
• SelectIO signaling
- Up to 633 I/O pins
- Eighteen single-ended signal standards
- Eight differential signal standards including LVDS
and RSDS
- Double Data Rate (DDR) support
• Logic resources
- Abundant logic cells with shift register capability
- Wide multiplexers
- Fast look-ahead carry logic
- Dedicated 18 x 18 multipliers
- JTAG logic compatible with IEEE 1149.1/1532
• SelectRAM hierarchical memory
- Up to 1,728 Kbits of total block RAM
- Up to 432 Kbits of total distributed RAM
• Digital Clock Manager (four DCMs)
- Clock skew elimination
- Frequency synthesis
- High-resolution phase shifting
• Eight global clock lines and abundant routing