Производитель | Xilinx |
Mounting Type | Surface Mount |
Number of I/O | 133 |
Package / Case | 160-BQFP |
Product Status | Obsolete |
Number of Gates | 4800 |
Programmable Type | In System Programmable (min 10K program/erase cycles) |
Number of Macrocells | 216 |
Delay Time tpd(1) Max | 10 ns |
Operating Temperature | -40°C ~ 85°C (TA) |
Supplier Device Package | 160-PQFP (28x28) |
Voltage Supply - Internal | 4.5V ~ 5.5V |
Number of Logic Elements/Blocks | 12 |
Description
The XC95216-10PQ160I is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of eight 36V18 Function Blocks, providing 4,800 usable gates with propagation delays of 10 ns. See Figure 2 for the architecture overview.
Features
• 10 ns pin-to-pin logic delays on all pins
• fCNT to 111 MHz
• 216 macrocells with 4,800 usable gates
• Up to 166 user I/O pins
• 5V in-system programmable
- Endurance of 10,000 program/erase cycles
- Program/erase over full commercial voltage and temperature range
• Enhanced pin-locking architecture
• Flexible 36V18 Function Block
- 90 product terms drive any or all of 18 macrocells within Function Block
- Global and product term clocks, output enables, set and reset signals
• Extensive IEEE Std 1149.1 boundary-scan (JTAG) support
• Programmable power reduction mode in each macrocell
• Slew rate control on individual outputs
• User programmable ground pin capability
• Extended pattern security features for design protection
• High-drive 24 mA outputs
• 3.3V or 5V I/O capability
• Advanced CMOS 5V FastFLASH™ technology
• Supports parallel programming of more than one XC9500 concurrently
• Available 160-pin PQFP, 352-pin BGA, and 208-pin HQFP packages (Note: 352-pin BGA packages are being discontinued for this device)
10 ns pin-to-pin logic delays on all pins
fCNT to 111 MHz
216 macrocells with 4,800 usable gates
Up to 166 user I/O pins
5V in-system programmable
Endurance of 10,000 program/erase cycles
Program/erase over full commercial voltage and temperature range
Enhanced pin-locking architecture
Flexible 36V18 Function Block
90 product terms drive any or all of 18 macrocells within Function Block
Global and product term clocks, output enables, set and reset signals
Extensive IEEE Std 1149.1 boundary-scan (JTAG) support
Programmable power reduction mode in each macrocell
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design protection
High-drive 24 mA outputs
3.3V or 5V I/O capability
Advanced CMOS 5V FastFLASH technology
Supports parallel programming of more than one XC9500 concurrently
Available 160-pin PQFP, 352-pin BGA, and 208-pin HQFP packages (Note: 352-pin BGA packages are being discontinued for this device)
Xilinx is a leading provider of programmable logic devices and associated technologies. As a top producer of programmable FPGAs, SoCs, MPSoCs, and 3D ICs, Xilinx has expanded quickly. Software defined and hardware optimized applications are supported by Xilinx, advancing the fields of cloud computing, SDN/NFV, video/vision, industrial IoT, and 5G wireless.
One of Xilinx's key innovations is the development of the Xilinx Vivado Design Suite, a comprehensive software toolchain used for designing and programming their FPGAs and SoCs. This suite provides developers with the necessary tools to create, simulate, and implement their designs on Xilinx devices.
In October 2020, Xilinx was acquired by Advanced Micro Devices (AMD), a major player in the semiconductor industry. This acquisition has enabled AMD to enhance its product portfolio and expand its offerings into the rapidly growing FPGA market.