Производитель | Xilinx |
Mounting Type | Surface Mount |
Number of I/O | 34 |
Package / Case | 44-LCC (J-Lead) |
Product Status | Obsolete |
Number of Gates | 1600 |
Programmable Type | In System Programmable (min 10K program/erase cycles) |
Number of Macrocells | 72 |
Delay Time tpd(1) Max | 15 ns |
Operating Temperature | 0°C ~ 70°C (TA) |
Supplier Device Package | 44-PLCC (16.59x16.59) |
Voltage Supply - Internal | 4.75V ~ 5.25V |
Number of Logic Elements/Blocks | 4 |
Features
• 7.5 ns pin-to-pin logic delays on all pins
• fCNT to 125 MHz
• 72 macrocells with 1,600 usable gates
• Up to 72 user I/O pins
• 5V in-system programmable
- Endurance of 10,000 program/erase cycles
- Program/erase over full commercial voltage and temperature range
• Enhanced pin-locking architecture
• Flexible 36V18 Function Block
- 90 product terms drive any or all of 18 macrocells within Function Block
- Global and product term clocks, output enables, set and reset signals
• Extensive IEEE Std 1149.1 boundary-scan (JTAG) support
• Programmable power reduction mode in each macrocell
• Slew rate control on individual outputs
• User programmable ground pin capability
• Extended pattern security features for design protection
• High-drive 24 mA outputs
• 3.3V or 5V I/O capability
• Advanced CMOS 5V FastFLASH™ technology
• Supports parallel programming of more than one XC9500 concurrently
Description
The XC9572-15PC44C is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of eight 36V18 Function Blocks, providing 1,600 usable gates with propagation delays of 7.5 ns
72 macrocells with 1,600 usable gates
Available in small footprint packages
44-pin VQFP (34 user I/O pins)
100-pin TQFP (72-user I/O pins)
Optimized for high-performance 2.5V systems
Low power operation
Multi-voltage operation
Advanced system features
In-system programmable
Superior pin-locking and routability with Fast CONNECT II switch matrix
Extra wide 54-input Function Blocks
Up to 90 product-terms per macrocell with individual product-term allocation
Local clock inversion with three global and one product-term clocks
Individual output enable per output pin
Input hysteresis on all user and boundary-scan pin inputs
Bus-hold ciruitry on all user pin inputs
Full IEEE Standard 1149.1 boundary-scan (JTAG)
Fast concurrent programming
Slew rate control on individual outputs
Enhanced data security features
Excellent quality and reliability
20 year data retention
ESD protection exceeding 2,000V
Xilinx is a leading provider of programmable logic devices and associated technologies. As a top producer of programmable FPGAs, SoCs, MPSoCs, and 3D ICs, Xilinx has expanded quickly. Software defined and hardware optimized applications are supported by Xilinx, advancing the fields of cloud computing, SDN/NFV, video/vision, industrial IoT, and 5G wireless.
One of Xilinx's key innovations is the development of the Xilinx Vivado Design Suite, a comprehensive software toolchain used for designing and programming their FPGAs and SoCs. This suite provides developers with the necessary tools to create, simulate, and implement their designs on Xilinx devices.
In October 2020, Xilinx was acquired by Advanced Micro Devices (AMD), a major player in the semiconductor industry. This acquisition has enabled AMD to enhance its product portfolio and expand its offerings into the rapidly growing FPGA market.