XC9572XL-10VQG44I FPGAs Overview
Description:
The XC9572XL-10VQG44I is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communi cations and computing systems. It is comprised of four
54V18 Function Blocks, providing 1,600 usable gates with
propagation delays of 5 ns.
Features:
· 5ns pin-to-pin logic delays
· System frequency up to 178MHz
·72 macrocells with 1,600 usable gates· Available in small footprint packages
-44-pin PLCC(34 user l/O pins)
-44-pin VQFP(34 user /O pins)
48-pin CSP(38 user l/O pins)
64-pin VQFP(52 user l/O pins)
-100-pin TQFP(72 user I/O pins)
-Pb-free available for all packages
· Optimized for high-performance 3.3V systems Low power operation
5V tolerant I/O pins accept 5V,3.3V, and 2.5V signals
3.3V or 2.5V output capability Advanced 0.35 micron feature size CMOS Fast FLASHTM technology
· Advanced system features
-In-system programmable Superior pin-locking and routability with Fast CONNECTTM II switch matrix
-Extra wide 54-input Function Blocks Up to 90 product-terms per macrocell with individual product-term allocation
-Local clock inversion with three global and one product-term clocks
-Individual output enable per output pin
-Input hysteresis on all user and boundary-scan pin inputs
-Bus-hold circuitry on all user pin inputs
-Full IEEE Standard 1149.1 boundary-scan(JTAG)
· Fast concurrent programming
· Slew rate control on individual outputs
· Enhanced data security features
· Excellent quality and reliability
The Xilinx Embedded - CPLDs (Complex Programmable Logic Devices) series XC9572XL-10VQG44I is CPLD, FLASH, 72, 34 I/O's, VQFP, 44 Pins, 100 MHz, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com,
and you can also search for other FPGAs products.
Features
• Optimized for high-performance 3.3V systems
- 5 ns pin-to-pin logic delays, with internal system frequency up to 208 MHz
- Small footprint packages including VQFPs, TQFPs and CSPs (Chip Scale Package)
- Pb-free available for all packages
- Lower power operation
- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals
- 3.3V or 2.5V output capability
- Advanced 0.35 micron feature size CMOS FastFLASH technology
• Advanced system features
- In-system programmable
- Superior pin-locking and routability with FastCONNECT II switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with individual product-term allocation
- Local clock inversion with three global and one product-term clocks
- Individual output enable per output pin with local inversion
- Input hysteresis on all user and boundary-scan pin inputs
- Bus-hold circuitry on all user pin inputs
- Supports hot-plugging capability
- Full IEEE Std 1149.1 boundary-scan (JTAG)
support on all devices
• Four pin-compatible device densities
- 36 to 288 macrocells, with 800 to 6400 usable gates
• Fast concurrent programming
• Slew rate control on individual outputs
• Enhanced data security features
• Excellent quality and reliability
- 10,000 program/erase cycles endurance rating
- 20 year data retention
• Pin-compatible with 5V core XC9500 family in common package footprints