XCS30XL-5TQ144C FPGAs Overview
Introduction:
The Spartan™ and the Spartan-XL families are a high-volume production FPGA solution that delivers all the key requirements for ASIC replacement up to 40,000 gates. These requirements include high performance, on-chip RAM, core solutions and prices that, in high volume, approach and in many cases are equivalent to mask programmed ASIC devices.
The Spartan series is the result of more than 14 years of FPGA design experience and feedback from thousands of customers. By streamlining the Spartan series feature set, leveraging advanced process technologies and focusing on total cost management, the Spartan series delivers the key features required by ASIC and other high-volume logic users while avoiding the initial cost, long development cycles and inherent risk of conventional ASICs.
Features:
Note: The Spartan series devices described in this data sheet include the 5V Spartan family and the 3.3V Spartan-XL family. See the separate data sheet for the 2.5V Spartan-II family.
• First ASIC replacement FPGA for high-volume production with on-chip RAM
• Density up to 1862 logic cells or 40,000 system gates
• Streamlined feature set based on XC4000 architecture
• System performance beyond 80 MHz
• Broad set of AllianceCORE™ and LogiCORE™ predefined solutions available
• Unlimited reprogrammability
• Low cost
• System level features - Available in both 5V and 3.3V versions
- On-chip SelectRAM™ memory
- Fully PCI compliant
- Full readback capability for program verification and internal node observability
- Dedicated high-speed carry logic
- Internal 3-state bus capability
- Eight global low-skew clock or signal networks
- IEEE 1149.1-compatible Boundary Scan logic
- Low cost plastic packages available in all densities
- Footprint compatibility in common packages
• Fully supported by powerful Xilinx development system
- Foundation Series: Integrated, shrink-wrap software
- Alliance Series: Dozens of PC and workstation third party development systems supported
- Fully automatic mapping, placement and routing
Features
• In-System Programmable PROMs for Configuration of Xilinx FPGAs
• Low-Power Advanced CMOS NOR Flash Process
• Endurance of 20,000 Program/Erase Cycles
• Operation over Full Industrial Temperature Range (–40°C to +85°C)
• IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming,
Prototyping, and Testing
• JTAG Command Initiation of Standard FPGA Configuration
Additional Spartan-XL Family Features
• 3.3V supply for low power with 5V tolerant I/Os
• Power down input
• Higher performance
• Faster carry logic
• More flexible high-speed clock network
• Latch capability in Configurable Logic Blocks
• Input fast capture latch
• Optional MUX or 2-input function generator on outputs
• 12 mA or 24 mA output drive
• 5V and 3.3V PCI compliant
• Enhanced Boundary Scan
• Express Mode configuration